The device level electro-thermal simulation of analog circuits and the logical gate level logi-thermal simulation of digital circuits are addressed in the paper. After presenting the main algorithms realization questions are also discussed. For both the electro-thermal cases simulated results of realized structures are presented. These are compared with benchmark results, proving the applicability and the accuracy of the methods.
|Number of pages||8|
|Journal||Annual IEEE Semiconductor Thermal Measurement and Management Symposium|
|Publication status||Published - jan. 1 2003|
|Event||Nineteents Annual IEEE Semiconductor Thermal Measurement And Management Symposium - San Jose, CA, United States|
Duration: márc. 11 2003 → márc. 13 2003
ASJC Scopus subject areas
- Electrical and Electronic Engineering