Volume and power optimized high-performance system for UAV collision avoidance

Zoltan Nagy, Andras Kiss, A. Zarándy, Tamas Zsedrovits, Balint Vanek, Tamas Peni, J. Bokor, T. Roska

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Citations (Scopus)

Abstract

An on-board UAV high-performance collision avoidance system sets up drastic constraints, which can be fulfilled by using carefully optimized many-core computational architectures. We report here a case study, where we implemented a many-core processor system, which can process a 100 megapixels/sec video flow, identifying remote airplanes, tracking flying objects by implementing computationally intensive Kalman filters. The introduced processor system is implemented in Spartan 6 FPGA, and consumes less than 1W.

Original languageEnglish
Title of host publicationISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems
Pages189-192
Number of pages4
DOIs
Publication statusPublished - 2012
Event2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012 - Seoul, Korea, Republic of
Duration: May 20 2012May 23 2012

Other

Other2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012
CountryKorea, Republic of
CitySeoul
Period5/20/125/23/12

Fingerprint

Collision avoidance
Unmanned aerial vehicles (UAV)
Kalman filters
Field programmable gate arrays (FPGA)
Aircraft

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Nagy, Z., Kiss, A., Zarándy, A., Zsedrovits, T., Vanek, B., Peni, T., ... Roska, T. (2012). Volume and power optimized high-performance system for UAV collision avoidance. In ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems (pp. 189-192). [6271640] https://doi.org/10.1109/ISCAS.2012.6271640

Volume and power optimized high-performance system for UAV collision avoidance. / Nagy, Zoltan; Kiss, Andras; Zarándy, A.; Zsedrovits, Tamas; Vanek, Balint; Peni, Tamas; Bokor, J.; Roska, T.

ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems. 2012. p. 189-192 6271640.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Nagy, Z, Kiss, A, Zarándy, A, Zsedrovits, T, Vanek, B, Peni, T, Bokor, J & Roska, T 2012, Volume and power optimized high-performance system for UAV collision avoidance. in ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems., 6271640, pp. 189-192, 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012, Seoul, Korea, Republic of, 5/20/12. https://doi.org/10.1109/ISCAS.2012.6271640
Nagy Z, Kiss A, Zarándy A, Zsedrovits T, Vanek B, Peni T et al. Volume and power optimized high-performance system for UAV collision avoidance. In ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems. 2012. p. 189-192. 6271640 https://doi.org/10.1109/ISCAS.2012.6271640
Nagy, Zoltan ; Kiss, Andras ; Zarándy, A. ; Zsedrovits, Tamas ; Vanek, Balint ; Peni, Tamas ; Bokor, J. ; Roska, T. / Volume and power optimized high-performance system for UAV collision avoidance. ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems. 2012. pp. 189-192
@inproceedings{772cddb9f4ba4850ac698ce01c4e0331,
title = "Volume and power optimized high-performance system for UAV collision avoidance",
abstract = "An on-board UAV high-performance collision avoidance system sets up drastic constraints, which can be fulfilled by using carefully optimized many-core computational architectures. We report here a case study, where we implemented a many-core processor system, which can process a 100 megapixels/sec video flow, identifying remote airplanes, tracking flying objects by implementing computationally intensive Kalman filters. The introduced processor system is implemented in Spartan 6 FPGA, and consumes less than 1W.",
author = "Zoltan Nagy and Andras Kiss and A. Zar{\'a}ndy and Tamas Zsedrovits and Balint Vanek and Tamas Peni and J. Bokor and T. Roska",
year = "2012",
doi = "10.1109/ISCAS.2012.6271640",
language = "English",
pages = "189--192",
booktitle = "ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems",

}

TY - GEN

T1 - Volume and power optimized high-performance system for UAV collision avoidance

AU - Nagy, Zoltan

AU - Kiss, Andras

AU - Zarándy, A.

AU - Zsedrovits, Tamas

AU - Vanek, Balint

AU - Peni, Tamas

AU - Bokor, J.

AU - Roska, T.

PY - 2012

Y1 - 2012

N2 - An on-board UAV high-performance collision avoidance system sets up drastic constraints, which can be fulfilled by using carefully optimized many-core computational architectures. We report here a case study, where we implemented a many-core processor system, which can process a 100 megapixels/sec video flow, identifying remote airplanes, tracking flying objects by implementing computationally intensive Kalman filters. The introduced processor system is implemented in Spartan 6 FPGA, and consumes less than 1W.

AB - An on-board UAV high-performance collision avoidance system sets up drastic constraints, which can be fulfilled by using carefully optimized many-core computational architectures. We report here a case study, where we implemented a many-core processor system, which can process a 100 megapixels/sec video flow, identifying remote airplanes, tracking flying objects by implementing computationally intensive Kalman filters. The introduced processor system is implemented in Spartan 6 FPGA, and consumes less than 1W.

UR - http://www.scopus.com/inward/record.url?scp=84866633693&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84866633693&partnerID=8YFLogxK

U2 - 10.1109/ISCAS.2012.6271640

DO - 10.1109/ISCAS.2012.6271640

M3 - Conference contribution

SP - 189

EP - 192

BT - ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems

ER -