Simulation framework for multilevel power estimation and timing analysis of digital systems allowing the consideration of thermal effects

Gergely Nagy, A. Poppe

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Citations (Scopus)

Abstract

This paper presents a simulation framework that considers the self-heating of digital blocks and thus helps designers, verification engineers and test engineers to predict or detect thermally sensitive regions and possible signal integrity issues in complex digital designs.

Original languageEnglish
Title of host publicationLATW 2012 - 13th IEEE Latin American Test Workshop
DOIs
Publication statusPublished - 2012
Event13th IEEE Latin American Test Workshop, LATW 2012 - Quito, Ecuador
Duration: Apr 10 2012Apr 13 2012

Other

Other13th IEEE Latin American Test Workshop, LATW 2012
CountryEcuador
CityQuito
Period4/10/124/13/12

Fingerprint

Thermal effects
Engineers
Heating

Keywords

  • design for testing
  • electro-thermal simulation
  • logi-thermal simulation
  • multilevel simulation

ASJC Scopus subject areas

  • Safety, Risk, Reliability and Quality

Cite this

Simulation framework for multilevel power estimation and timing analysis of digital systems allowing the consideration of thermal effects. / Nagy, Gergely; Poppe, A.

LATW 2012 - 13th IEEE Latin American Test Workshop. 2012. 6261250.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Nagy, G & Poppe, A 2012, Simulation framework for multilevel power estimation and timing analysis of digital systems allowing the consideration of thermal effects. in LATW 2012 - 13th IEEE Latin American Test Workshop., 6261250, 13th IEEE Latin American Test Workshop, LATW 2012, Quito, Ecuador, 4/10/12. https://doi.org/10.1109/LATW.2012.6261250
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