Neural synaptic weighting with a pulse-based memristor circuit

Hyongsuk Kim, Maheshwar Pd Sah, Changju Yang, Tamás Roska, Leon O. Chua

Research output: Contribution to journalArticle

226 Citations (Scopus)


A pulse-based programmable memristor circuit for implementing synaptic weights for artificial neural networks is proposed. In the memristor weighting circuit, both positive and negative multiplications are performed via a charge-dependent Ohm's law ($ v = M(q) × i). The circuit is composed of five memristors with bridge-like connections and operates like an artificial synapse with pulse-based processing and adjustability. The sign switching pulses, weight setting pulses and synaptic processing pulses are applied through a shared input terminal. Simulations are done with both linear TiO 2 memristor and window-based nonlinear memristor models.

Original languageEnglish
Article number5976989
Pages (from-to)148-158
Number of pages11
JournalIEEE Transactions on Circuits and Systems I: Regular Papers
Issue number1
Publication statusPublished - Jan 1 2012



  • Adjustability
  • memristor
  • programmable synapse
  • pulse-based processing
  • synaptic weight

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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