How to avoid false lock in SPLL frequency synthesizers

Zoltan Szabó, G. Kolumbán

Research output: Contribution to journalArticle

2 Citations (Scopus)

Abstract

Two attractors coexist in sampling phase-locked loop (SPLL) implemented with loop filter if the time constant of the loop filter is much larger than the reference period. Consequently, after acquisition, the SPLL either reaches the desired phase lock or gets into false lock, depending on the initial conditions. This paper develops a model for false lock which explains why the SPLL may get into false lock. Having understood its mechanism, a simple circuit is proposed to prevent the development of false lock.

Original languageEnglish
Pages (from-to)927-931
Number of pages5
JournalIEEE Transactions on Instrumentation and Measurement
Volume52
Issue number3
DOIs
Publication statusPublished - Jun 2003

Fingerprint

frequency synthesizers
Frequency synthesizers
Phase locked loops
sampling
Sampling
filters
Networks (circuits)
time constant
acquisition

Keywords

  • Coexisting attractors
  • False lock
  • Frequency synthesizer
  • Sampling phase-locked loop
  • Unwanted periodic orbit

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Instrumentation

Cite this

How to avoid false lock in SPLL frequency synthesizers. / Szabó, Zoltan; Kolumbán, G.

In: IEEE Transactions on Instrumentation and Measurement, Vol. 52, No. 3, 06.2003, p. 927-931.

Research output: Contribution to journalArticle

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