FPGA based TDC using Virtex-4 ISERDES blocks

Gy Hegyesi, G. Kalinka, J. Molnár, F. Nagy, J. Imrek, Zs Szabó

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

We report on the implementation of an interleaving TDC architecture based on Virtex-4 ISERDES blocks. Multiple ISERDES blocks are used for each input channel in a split-phase arrangement. The architecture has moderate resolution (312 ps in this implementation), it is not sensitive to PVT variations, requires only limited FPGA resources, and thus suitable for high channel counts.

Original languageEnglish
Title of host publicationIEEE Nuclear Science Symposuim and Medical Imaging Conference, NSS/MIC 2010
Pages1413-1415
Number of pages3
DOIs
Publication statusPublished - Dec 1 2010
Event2010 IEEE Nuclear Science Symposium, Medical Imaging Conference, NSS/MIC 2010 and 17th International Workshop on Room-Temperature Semiconductor X-ray and Gamma-ray Detectors, RTSD 2010 - Knoxville, TN, United States
Duration: Oct 30 2010Nov 6 2010

Publication series

NameIEEE Nuclear Science Symposium Conference Record
ISSN (Print)1095-7863

Other

Other2010 IEEE Nuclear Science Symposium, Medical Imaging Conference, NSS/MIC 2010 and 17th International Workshop on Room-Temperature Semiconductor X-ray and Gamma-ray Detectors, RTSD 2010
CountryUnited States
CityKnoxville, TN
Period10/30/1011/6/10

ASJC Scopus subject areas

  • Radiation
  • Nuclear and High Energy Physics
  • Radiology Nuclear Medicine and imaging

Fingerprint Dive into the research topics of 'FPGA based TDC using Virtex-4 ISERDES blocks'. Together they form a unique fingerprint.

  • Cite this

    Hegyesi, G., Kalinka, G., Molnár, J., Nagy, F., Imrek, J., & Szabó, Z. (2010). FPGA based TDC using Virtex-4 ISERDES blocks. In IEEE Nuclear Science Symposuim and Medical Imaging Conference, NSS/MIC 2010 (pp. 1413-1415). [5874005] (IEEE Nuclear Science Symposium Conference Record). https://doi.org/10.1109/NSSMIC.2010.5874005