FPGA-based SIFT implementation for wearable computing

Attila Fejér, Zoltán Nagy, Jenny Benois-Pineau, Péter Szolgay, Aymar De Rugy, Jean Philippe Domenger

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The article describes the first steps to achieve control over a robotic or prosthetic arm based on analysis of visual environment acquired in real-time by video cameras on glasses and on the prosthesis. One of the main goals of the research is to develop a wearable, portable, lightweight, and low power consumption device for visual scene analysis. This paper will discuss the critical steps of its implementation on an FPGA board. We implemented some time-consuming parts of the SFT algorithm needed for the analysis in C/C++ language on TUL PYNQ-Z2 FPGA board. This implementation allows for a low power consumption of the programmable logic part of the system. The obtained value is 0. 274W. Processing capacity is 96.45 images per second on a small wearable size device which allow for the real-time implementation of the whole analysis in the future.

Original languageEnglish
Title of host publicationProceedings - 2019 22nd International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728100739
DOIs
Publication statusPublished - Apr 2019
Event22nd International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2019 - Cluj-Napoca, Romania
Duration: Apr 24 2019Apr 26 2019

Publication series

NameProceedings - 2019 22nd International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2019

Conference

Conference22nd International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2019
CountryRomania
CityCluj-Napoca
Period4/24/194/26/19

Keywords

  • FPGA
  • SFT
  • computer vision
  • image processing
  • prosthetic arm

ASJC Scopus subject areas

  • Artificial Intelligence
  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality
  • Control and Optimization

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  • Cite this

    Fejér, A., Nagy, Z., Benois-Pineau, J., Szolgay, P., De Rugy, A., & Domenger, J. P. (2019). FPGA-based SIFT implementation for wearable computing. In Proceedings - 2019 22nd International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2019 [8724653] (Proceedings - 2019 22nd International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2019). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/DDECS.2019.8724653