Feasibility study of a CMOS-compatible integrated solar photovoltaic cell array

B. Plesz, L. Juhász, J. Mizsei

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Citations (Scopus)

Abstract

Due to the low power consumption of sensors resulted by recent developments solar energy seems to be an attractive power source for self-powered devices. A proposal of a chipscale solar module was given by Perlaky et al [8], containing a possible structure and a model for the proposed structure. This paper gives a more sophisticated model of the structure proposed in [8] by taking into account the parasitic transistor present in the structure. Based on this model simulations are performed and some crucial issues of the structure are detected. Finally a modified structure of a chip-scale solar module is presented, that incorporates solutions for the issues found during simulations.

Original languageEnglish
Title of host publicationSymposium on Design, Test, Integration and Packaging of MEMS/MOEMS, DTIP 2010
Pages403-406
Number of pages4
Publication statusPublished - Oct 18 2010
EventSymposium on Design, Test, Integration and Packaging of MEMS/MOEMS, DTIP 2010 - Seville, Spain
Duration: May 5 2010May 7 2010

Publication series

NameSymposium on Design, Test, Integration and Packaging of MEMS/MOEMS, DTIP 2010

Other

OtherSymposium on Design, Test, Integration and Packaging of MEMS/MOEMS, DTIP 2010
CountrySpain
CitySeville
Period5/5/105/7/10

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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    Plesz, B., Juhász, L., & Mizsei, J. (2010). Feasibility study of a CMOS-compatible integrated solar photovoltaic cell array. In Symposium on Design, Test, Integration and Packaging of MEMS/MOEMS, DTIP 2010 (pp. 403-406). [5486515] (Symposium on Design, Test, Integration and Packaging of MEMS/MOEMS, DTIP 2010).