Efficient mapping of mathematical expressions to FPGAs: Exploring different design methodologies

Csaba Nemes, Zoltán Nagy, P. Szolgay

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

Computationally intensive problems can be represented with data-flow graphs and automatically transformed to locally controlled floating-point units via partitioning. In theory the lack of global control signals enables high performance implementation however placing and routing of the partitioned circuits are not trivial. In practice to create a high performance implementation the clusters should be placed efficiently on the surface of an FPGA using the physical constraining feature of CAD tools. In the paper a new partitioning strategy is presented which not only minimizes the number of cut nets but produce partition which can be mapped without long interconnections between the clusters. The new strategy is demonstrated during the automatic circuit generation from a complex mathematical expression. The proposed partitioning method produces more cut nets than common strategies however the resulting partition can be easily mapped and operate on significantly higher frequency.

Original languageEnglish
Title of host publication2011 20th European Conference on Circuit Theory and Design, ECCTD 2011
Pages717-720
Number of pages4
DOIs
Publication statusPublished - 2011
Event2011 20th European Conference on Circuit Theory and Design, ECCTD 2011 - Linkoping, Sweden
Duration: Aug 29 2011Aug 31 2011

Other

Other2011 20th European Conference on Circuit Theory and Design, ECCTD 2011
CountrySweden
CityLinkoping
Period8/29/118/31/11

Fingerprint

Field programmable gate arrays (FPGA)
Data flow graphs
Networks (circuits)
Computer aided design

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Nemes, C., Nagy, Z., & Szolgay, P. (2011). Efficient mapping of mathematical expressions to FPGAs: Exploring different design methodologies. In 2011 20th European Conference on Circuit Theory and Design, ECCTD 2011 (pp. 717-720). [6043644] https://doi.org/10.1109/ECCTD.2011.6043644

Efficient mapping of mathematical expressions to FPGAs : Exploring different design methodologies. / Nemes, Csaba; Nagy, Zoltán; Szolgay, P.

2011 20th European Conference on Circuit Theory and Design, ECCTD 2011. 2011. p. 717-720 6043644.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Nemes, C, Nagy, Z & Szolgay, P 2011, Efficient mapping of mathematical expressions to FPGAs: Exploring different design methodologies. in 2011 20th European Conference on Circuit Theory and Design, ECCTD 2011., 6043644, pp. 717-720, 2011 20th European Conference on Circuit Theory and Design, ECCTD 2011, Linkoping, Sweden, 8/29/11. https://doi.org/10.1109/ECCTD.2011.6043644
Nemes C, Nagy Z, Szolgay P. Efficient mapping of mathematical expressions to FPGAs: Exploring different design methodologies. In 2011 20th European Conference on Circuit Theory and Design, ECCTD 2011. 2011. p. 717-720. 6043644 https://doi.org/10.1109/ECCTD.2011.6043644
Nemes, Csaba ; Nagy, Zoltán ; Szolgay, P. / Efficient mapping of mathematical expressions to FPGAs : Exploring different design methodologies. 2011 20th European Conference on Circuit Theory and Design, ECCTD 2011. 2011. pp. 717-720
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