Digital multiprocessor hardware accelerator board for cellular neural networks: CNN-HAC

T. Roska, G. Bartfai, P. Szolgay, T. Szirányi, A. Radvanyi, T. Kozek, Zs Ugray, A. Zarándy

Research output: Contribution to journalArticle

16 Citations (Scopus)

Abstract

Analogue realizations of neural networks are superior in speed. The hardware accelerator boards using catalogue programmable VLSI ICs represent a trade-off having higher reconfigurability and lower cost. This paper presents such a solution for a cellular neural network (CNN). The architecture of the present design (CNN-HAC) using four standard DSPs to calculate the transient response of a one-layer CNN containing (0·25-0·75)×106 analogue neural cells (depending on the type of template) is presented. The architecture and also the design principles are independent of the number of processors. The actual design was made in the form of a PC add-on board. The global control unit, which connects the board to the host firmware and communicates control signals to/from the local control units of the DSPs, was realized mainly with EPLDs. A special correspondence between the virtual processing elements - calculating the time-discrete models of the analogue neural cells - and the physical ones is discussed in detail. It is realized in an architecture with a simple, two-directional interprocessor communication. This architecture can be `scaled down' using faster processors, EPLDs and memories. The present version runs with 2 μs/cell/iteration speed.

Original languageEnglish
Pages (from-to)589-599
Number of pages11
JournalInternational Journal of Circuit Theory and Applications
Volume20
Issue number5
Publication statusPublished - Sep 1992

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Hardware Accelerator
Cellular neural networks
Multiprocessor
Cellular Networks
Particle accelerators
Neural Networks
Hardware
Analogue
Cell
Firmware
Reconfigurability
Interprocessor Communication
Transient analysis
Unit
Transient Response
Signal Control
Neural networks
Data storage equipment
Template
Discrete-time

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Digital multiprocessor hardware accelerator board for cellular neural networks : CNN-HAC. / Roska, T.; Bartfai, G.; Szolgay, P.; Szirányi, T.; Radvanyi, A.; Kozek, T.; Ugray, Zs; Zarándy, A.

In: International Journal of Circuit Theory and Applications, Vol. 20, No. 5, 09.1992, p. 589-599.

Research output: Contribution to journalArticle

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