Data locality-based mesh partitioning methods for dataflow machines

Antal Hiba, Zoltan Nagy, Miklos Ruszinko, Peter Szolgay

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Power efficiency became an important factor in High Performance Computing (HPC). FPGA-based dataflow machines are the best candidates for power efficient computing, because of the maximized memory bandwidth utilization, and user-defined optimal caching. However, input data streams are required with optimized data locality. This paper focuses on the possibilities of novel mesh partitioning techniques, which provide partitions with better data locality.

Original languageEnglish
Title of host publicationInternational Workshop on Cellular Nanoscale Networks and their Applications
EditorsMichael Niemier, Wolfgang Porod
PublisherIEEE Computer Society
ISBN (Electronic)9781479964680
DOIs
Publication statusPublished - Aug 29 2014
Event2014 14th International Workshop on Cellular Nanoscale Networks and Their Applications, CNNA 2014 - Notre Dame, United States
Duration: Jul 29 2014Jul 31 2014

Publication series

NameInternational Workshop on Cellular Nanoscale Networks and their Applications
ISSN (Print)2165-0160
ISSN (Electronic)2165-0179

Other

Other2014 14th International Workshop on Cellular Nanoscale Networks and Their Applications, CNNA 2014
CountryUnited States
CityNotre Dame
Period7/29/147/31/14

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Electrical and Electronic Engineering

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  • Cite this

    Hiba, A., Nagy, Z., Ruszinko, M., & Szolgay, P. (2014). Data locality-based mesh partitioning methods for dataflow machines. In M. Niemier, & W. Porod (Eds.), International Workshop on Cellular Nanoscale Networks and their Applications [6888599] (International Workshop on Cellular Nanoscale Networks and their Applications). IEEE Computer Society. https://doi.org/10.1109/CNNA.2014.6888599