Cooling as a possible way to extend the usability of IDDQ testing

V. Székely, M. Rencz, S. Török, B. Courtois

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Abstract

A reduction of the VDD voltage, and thus the threshold voltage, in submicrometre CMOS circuits, results in an increase in the subthreshold current of the transistors and, consequently, in an increase in the overall quiescent current. This effect prohibits the use of IDDQ testing. Based on experimental investigation into the subthreshold characteristics of deep submicrometre transistors, the authors propose a cooling of the circuit under test as a method to reduce these difficulties.

Original languageEnglish
Pages (from-to)2117-2118
Number of pages2
JournalElectronics Letters
Volume33
Issue number25
DOIs
Publication statusPublished - Jan 1 1997

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Keywords

  • Circuit testing

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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