Configurable 3D-integrated focal-plane cellular sensor-processor array architecture

Péter Földesy, Ákos Zarándy, Csaba Rekeczky

Research output: Contribution to journalArticle

30 Citations (Scopus)

Abstract

Mixed-signal cellular visual microprocessor architecture with digital processors is described. An Application Specific Integrated Circuit (ASIC) implementation is also demonstrated. The architecture is composed of a regular sensor readout circuit array, prepared for 3D face-to-face-type integration, and one or several cascaded array of mainly identical (single instruction multiple data, SIMD) processing elements. The individual array elements were derived from the same general Hardware Description Language (HDL) description and could be of different sizes, aspect ratio, and computing resources.

Original languageEnglish
Pages (from-to)573-588
Number of pages16
JournalInternational Journal of Circuit Theory and Applications
Volume36
Issue number5-6
DOIs
Publication statusPublished - Jul 1 2008

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Keywords

  • 3D integration
  • Focal plane
  • Parallel processing
  • SIMD
  • Sensor-processor

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Computer Science Applications
  • Electrical and Electronic Engineering
  • Applied Mathematics

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