The program CELLINEX presented in the paper finds the cellular interconnections from the layout of cell-structured integrated circuits. From this the logical description of the circuit is generated and it is checked whether the realized interconnections are permitted or not and whether there are trivial lacks or not. The paper describes the characteristics of the program and the most important algorithms. Some kinds of documentation of the results are presented.
|Number of pages||14|
|Journal||Periodica Polytechnica Electrical Engineering|
|Publication status||Published - Jan 1 1985|
ASJC Scopus subject areas
- Electrical and Electronic Engineering