2D operators on topographic and non-topographic architectures- implementation, efficiency analysis, and architecture selection methodology

Ákos Zarándy, Csaba Rekeczky

Research output: Contribution to journalArticle

13 Citations (Scopus)

Abstract

Topographic and non-topographic image processing architectures and chips, developed within the CNN community recently, are analyzed and compared. It is achieved on a way that the 2D operators are collected to classes according to their implementation methods on the different architectures, and the main implementation parameters of the different operator classes are compared. Based on the results, an efficient architecture selection methodology is formalized.

Original languageEnglish
Pages (from-to)983-1005
Number of pages23
JournalInternational Journal of Circuit Theory and Applications
Volume39
Issue number10
DOIs
Publication statusPublished - Oct 1 2011

Keywords

  • image processing
  • low power
  • multi-core processing
  • non-topographic processor arrays
  • topographic processor arrays

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Computer Science Applications
  • Electrical and Electronic Engineering
  • Applied Mathematics

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